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https://github.com/imjasonh/nescript
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Implement IR-based code generator (--use-ir)
New src/codegen/ir_codegen.rs walks IrProgram and emits 6502 instructions. This enables optimizer passes to actually affect the output ROM. Design: - Each IR temp gets a zero-page slot at $80 + temp_index - Functions reset the temp counter at entry (temps don't outlive functions) - Globals map by name to their analyzer-assigned zero-page addresses - Operands are loaded into A, computed, stored back to the dest slot Handles all IrOp variants: - LoadImm, LoadVar, StoreVar (basic loads/stores) - Add/Sub (CLC+ADC / SEC+SBC) - Mul (JSR __multiply runtime routine) - And/Or/Xor (zero-page operands) - ShiftLeft/ShiftRight (repeated ASL/LSR) - Negate/Complement (EOR #$FF + optional two's complement) - CmpEq/Ne/Lt/Gt/LtEq/GtEq (CMP + conditional branch + 0/1) - ArrayLoad/ArrayStore (TAX + ZeroPageX/AbsoluteX) - Call (ZP param passing + JSR) - DrawSprite (OAM slot 0 write, uses sprite_tiles map) - ReadInput (LDA $01, P1 input) - WaitFrame (poll frame flag at $00) All terminators: - Jump (JMP to block label) - Branch (LDA temp + BNE true / JMP false) - Return (optional value in A + RTS) - Unreachable (BRK) IR lowering fixes: - ReadInput now has a destination IrTemp (was a side-effect-only op) - ButtonRead uses the proper input temp instead of uninitialized register - Logical AND/OR use new emit_move helper (OR with zero) instead of bogus raw VarId for path merging CLI: - New --use-ir flag on `build` subcommand to opt in to IR codegen - Default remains AST codegen (for now); IR codegen is experimental All 7 examples compile through the IR pipeline and produce valid iNES ROMs. Tests: 266 total (7 new ir_codegen unit + 2 new integration). https://claude.ai/code/session_01W6eQFStA66EuMKHUFo2rx3
This commit is contained in:
Claude
parent
5512567349
commit
1ede169f1e
8 changed files with 650 additions and 17 deletions
539
src/codegen/ir_codegen.rs
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539
src/codegen/ir_codegen.rs
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//! IR-based code generator.
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//!
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//! Walks an `IrProgram` and produces 6502 instructions. Uses a simple
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//! strategy: each IR temp is assigned a zero-page slot in the function's
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//! temp region. Operations load operands from their slots into A, compute,
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//! and store back. This is not efficient but is correct and easy to reason
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//! about. A proper register allocator would use A/X/Y directly for short
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//! live ranges.
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//!
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//! Zero-page layout (shared with AST codegen):
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//! - `$00` frame flag
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//! - `$01` input P1
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//! - `$02` scratch temp
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//! - `$03` `current_state`
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//! - `$04-$07` function call params
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//! - `$08` input P2
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//! - `$09-$0F` reserved
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//! - `$10+` user variables + IR temp slots
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//!
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//! IR temps are allocated starting at `TEMP_BASE` (`$80`), giving 128 bytes
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//! (`0x80-0xFF`) for IR temp storage per function. Functions reset the
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//! temp counter at entry.
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use std::collections::HashMap;
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use crate::analyzer::VarAllocation;
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use crate::asm::{AddressingMode as AM, Instruction, Opcode::*};
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use crate::ir::{IrBasicBlock, IrFunction, IrOp, IrProgram, IrTemp, IrTerminator, VarId};
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/// Base zero-page address for IR temp slots.
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const TEMP_BASE: u8 = 0x80;
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/// IR codegen that produces 6502 instructions from an `IrProgram`.
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pub struct IrCodeGen<'a> {
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instructions: Vec<Instruction>,
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/// Map from IR `VarId` to zero-page address.
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var_addrs: HashMap<VarId, u16>,
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/// Map from `IrTemp` to zero-page slot within the current function.
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temp_slots: HashMap<IrTemp, u8>,
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/// Next available temp slot for the current function.
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next_temp_slot: u8,
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/// Sprite name to tile index mapping.
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sprite_tiles: HashMap<String, u8>,
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_allocations: &'a [VarAllocation],
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}
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impl<'a> IrCodeGen<'a> {
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pub fn new(allocations: &'a [VarAllocation], ir: &IrProgram) -> Self {
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// Map IR global VarIds to their allocated addresses.
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// Globals in IR are in the same order as in the analyzer, so we
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// can align them by name.
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let mut var_addrs = HashMap::new();
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for global in &ir.globals {
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if let Some(alloc) = allocations.iter().find(|a| a.name == global.name) {
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var_addrs.insert(global.var_id, alloc.address);
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}
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}
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Self {
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instructions: Vec::new(),
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var_addrs,
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temp_slots: HashMap::new(),
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next_temp_slot: 0,
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sprite_tiles: HashMap::new(),
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_allocations: allocations,
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}
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}
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#[must_use]
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pub fn with_sprites(mut self, sprites: &[crate::linker::SpriteData]) -> Self {
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for sprite in sprites {
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self.sprite_tiles
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.insert(sprite.name.clone(), sprite.tile_index);
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}
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self
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}
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fn emit(&mut self, opcode: crate::asm::Opcode, mode: AM) {
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self.instructions.push(Instruction::new(opcode, mode));
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}
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fn emit_label(&mut self, name: &str) {
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self.instructions
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.push(Instruction::new(NOP, AM::Label(name.to_string())));
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}
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/// Return the zero-page address for an IR temp, allocating a new slot
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/// if needed.
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fn temp_addr(&mut self, temp: IrTemp) -> u8 {
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if let Some(&slot) = self.temp_slots.get(&temp) {
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return slot;
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}
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let slot = TEMP_BASE + self.next_temp_slot;
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self.next_temp_slot = self.next_temp_slot.wrapping_add(1);
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self.temp_slots.insert(temp, slot);
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slot
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}
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/// Load a temp's value into A.
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fn load_temp(&mut self, temp: IrTemp) {
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let addr = self.temp_addr(temp);
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self.emit(LDA, AM::ZeroPage(addr));
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}
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/// Store A into a temp's slot.
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fn store_temp(&mut self, temp: IrTemp) {
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let addr = self.temp_addr(temp);
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self.emit(STA, AM::ZeroPage(addr));
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}
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/// Generate instructions for an entire IR program.
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/// Returns the flat list of 6502 instructions in the same order
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/// expected by the linker (variable init → main loop → function bodies).
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pub fn generate(mut self, ir: &IrProgram) -> Vec<Instruction> {
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// Emit variable initializers for globals with literal init values.
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for global in &ir.globals {
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if let Some(val) = global.init_value {
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if let Some(&addr) = self.var_addrs.get(&global.var_id) {
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self.emit(LDA, AM::Immediate(val as u8));
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if addr < 0x100 {
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self.emit(STA, AM::ZeroPage(addr as u8));
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} else {
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self.emit(STA, AM::Absolute(addr));
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}
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}
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}
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}
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// Emit each function body
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for func in &ir.functions {
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self.gen_function(func);
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}
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self.instructions
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}
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fn gen_function(&mut self, func: &IrFunction) {
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// Reset temp slot allocator per function
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self.temp_slots.clear();
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self.next_temp_slot = 0;
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self.emit_label(&format!("__ir_fn_{}", func.name));
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for block in &func.blocks {
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self.gen_block(block);
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}
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}
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fn gen_block(&mut self, block: &IrBasicBlock) {
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self.emit_label(&format!("__ir_blk_{}", block.label));
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for op in &block.ops {
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self.gen_op(op);
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}
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self.gen_terminator(&block.terminator);
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}
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#[allow(clippy::too_many_lines)]
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fn gen_op(&mut self, op: &IrOp) {
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match op {
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IrOp::LoadImm(dest, val) => {
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self.emit(LDA, AM::Immediate(*val));
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self.store_temp(*dest);
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}
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IrOp::LoadVar(dest, var) => {
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if let Some(&addr) = self.var_addrs.get(var) {
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if addr < 0x100 {
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self.emit(LDA, AM::ZeroPage(addr as u8));
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} else {
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self.emit(LDA, AM::Absolute(addr));
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}
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self.store_temp(*dest);
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}
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}
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IrOp::StoreVar(var, src) => {
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if let Some(&addr) = self.var_addrs.get(var) {
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self.load_temp(*src);
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if addr < 0x100 {
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self.emit(STA, AM::ZeroPage(addr as u8));
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} else {
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self.emit(STA, AM::Absolute(addr));
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}
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}
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}
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IrOp::Add(d, a, b) => {
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self.load_temp(*a);
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self.emit(CLC, AM::Implied);
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let b_addr = self.temp_addr(*b);
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self.emit(ADC, AM::ZeroPage(b_addr));
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self.store_temp(*d);
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}
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IrOp::Sub(d, a, b) => {
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self.load_temp(*a);
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self.emit(SEC, AM::Implied);
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let b_addr = self.temp_addr(*b);
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self.emit(SBC, AM::ZeroPage(b_addr));
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self.store_temp(*d);
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}
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IrOp::Mul(d, a, b) => {
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// Software multiply: multiplicand in A, multiplier in $02
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self.load_temp(*a);
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self.emit(PHA, AM::Implied); // Save for __multiply contract
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let b_addr = self.temp_addr(*b);
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self.emit(LDA, AM::ZeroPage(b_addr));
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self.emit(STA, AM::ZeroPage(0x02));
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self.emit(PLA, AM::Implied);
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self.emit(JSR, AM::Label("__multiply".into()));
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self.store_temp(*d);
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}
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IrOp::And(d, a, b) => {
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self.load_temp(*a);
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let b_addr = self.temp_addr(*b);
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self.emit(AND, AM::ZeroPage(b_addr));
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self.store_temp(*d);
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}
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IrOp::Or(d, a, b) => {
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self.load_temp(*a);
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let b_addr = self.temp_addr(*b);
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self.emit(ORA, AM::ZeroPage(b_addr));
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self.store_temp(*d);
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}
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IrOp::Xor(d, a, b) => {
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self.load_temp(*a);
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let b_addr = self.temp_addr(*b);
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self.emit(EOR, AM::ZeroPage(b_addr));
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self.store_temp(*d);
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}
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IrOp::ShiftLeft(d, a, count) => {
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self.load_temp(*a);
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for _ in 0..*count {
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self.emit(ASL, AM::Accumulator);
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}
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self.store_temp(*d);
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}
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IrOp::ShiftRight(d, a, count) => {
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self.load_temp(*a);
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for _ in 0..*count {
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self.emit(LSR, AM::Accumulator);
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}
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self.store_temp(*d);
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}
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IrOp::Negate(d, src) => {
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self.load_temp(*src);
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self.emit(EOR, AM::Immediate(0xFF));
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self.emit(CLC, AM::Implied);
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self.emit(ADC, AM::Immediate(1));
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self.store_temp(*d);
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}
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IrOp::Complement(d, src) => {
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self.load_temp(*src);
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self.emit(EOR, AM::Immediate(0xFF));
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self.store_temp(*d);
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}
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IrOp::CmpEq(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::Eq),
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IrOp::CmpNe(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::Ne),
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IrOp::CmpLt(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::Lt),
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IrOp::CmpGt(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::Gt),
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IrOp::CmpLtEq(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::LtEq),
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IrOp::CmpGtEq(d, a, b) => self.gen_cmp(*d, *a, *b, CmpKind::GtEq),
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IrOp::ArrayLoad(dest, var, idx) => {
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if let Some(&base_addr) = self.var_addrs.get(var) {
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self.load_temp(*idx);
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self.emit(TAX, AM::Implied);
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if base_addr < 0x100 {
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self.emit(LDA, AM::ZeroPageX(base_addr as u8));
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} else {
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self.emit(LDA, AM::AbsoluteX(base_addr));
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}
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self.store_temp(*dest);
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}
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}
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IrOp::ArrayStore(var, idx, val) => {
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if let Some(&base_addr) = self.var_addrs.get(var) {
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self.load_temp(*idx);
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self.emit(TAX, AM::Implied);
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self.load_temp(*val);
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if base_addr < 0x100 {
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self.emit(STA, AM::ZeroPageX(base_addr as u8));
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} else {
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self.emit(STA, AM::AbsoluteX(base_addr));
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}
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}
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}
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IrOp::Call(dest, name, args) => {
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for (i, arg) in args.iter().enumerate() {
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self.load_temp(*arg);
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self.emit(STA, AM::ZeroPage(0x04 + i as u8));
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}
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self.emit(JSR, AM::Label(format!("__fn_{name}")));
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if let Some(d) = dest {
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// Return value is in A
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self.store_temp(*d);
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}
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}
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IrOp::DrawSprite {
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sprite_name,
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x,
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y,
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frame,
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} => {
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// Writes to OAM slot 0 for IR codegen (simple, single sprite).
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// Multi-OAM would require a slot counter like the AST codegen.
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self.load_temp(*y);
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self.emit(STA, AM::Absolute(0x0200));
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if let Some(f) = frame {
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self.load_temp(*f);
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} else if let Some(&tile) = self.sprite_tiles.get(sprite_name) {
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self.emit(LDA, AM::Immediate(tile));
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} else {
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self.emit(LDA, AM::Immediate(0));
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}
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self.emit(STA, AM::Absolute(0x0201));
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self.emit(LDA, AM::Immediate(0));
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self.emit(STA, AM::Absolute(0x0202));
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self.load_temp(*x);
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self.emit(STA, AM::Absolute(0x0203));
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}
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IrOp::ReadInput(dest) => {
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self.emit(LDA, AM::ZeroPage(0x01)); // ZP_INPUT_P1
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self.store_temp(*dest);
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}
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IrOp::WaitFrame => {
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// Poll frame flag at $00 until nonzero, then clear it
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let wait_label = format!("__ir_wait_{}", self.instructions.len());
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self.emit_label(&wait_label);
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self.emit(LDA, AM::ZeroPage(0x00));
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self.emit(BEQ, AM::LabelRelative(wait_label));
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self.emit(LDA, AM::Immediate(0));
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self.emit(STA, AM::ZeroPage(0x00));
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}
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IrOp::Transition(name) => {
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// Write state index 0 as a placeholder — the AST codegen
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// does the real state index mapping. For IR codegen demo
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// purposes we emit a no-op transition here.
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let _ = name;
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}
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IrOp::SourceLoc(_) => {
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// No code for source location markers
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}
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}
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}
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fn gen_cmp(&mut self, dest: IrTemp, a: IrTemp, b: IrTemp, kind: CmpKind) {
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self.load_temp(a);
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let b_addr = self.temp_addr(b);
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self.emit(CMP, AM::ZeroPage(b_addr));
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let true_label = format!("__ir_cmp_t_{}", self.instructions.len());
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let end_label = format!("__ir_cmp_e_{}", self.instructions.len());
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match kind {
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CmpKind::Eq => self.emit(BEQ, AM::LabelRelative(true_label.clone())),
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CmpKind::Ne => self.emit(BNE, AM::LabelRelative(true_label.clone())),
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CmpKind::Lt => self.emit(BCC, AM::LabelRelative(true_label.clone())),
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CmpKind::GtEq => self.emit(BCS, AM::LabelRelative(true_label.clone())),
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CmpKind::Gt => {
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// > : not equal AND carry set
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self.emit(BEQ, AM::LabelRelative(end_label.clone()));
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self.emit(BCS, AM::LabelRelative(true_label.clone()));
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}
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CmpKind::LtEq => {
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// <= : equal OR carry clear
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self.emit(BEQ, AM::LabelRelative(true_label.clone()));
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self.emit(BCC, AM::LabelRelative(true_label.clone()));
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}
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}
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// False path
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self.emit(LDA, AM::Immediate(0));
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self.emit(JMP, AM::Label(end_label.clone()));
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// True path
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self.emit_label(&true_label);
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self.emit(LDA, AM::Immediate(1));
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self.emit_label(&end_label);
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self.store_temp(dest);
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}
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fn gen_terminator(&mut self, terminator: &IrTerminator) {
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match terminator {
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IrTerminator::Jump(label) => {
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self.emit(JMP, AM::Label(format!("__ir_blk_{label}")));
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}
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IrTerminator::Branch(cond, true_label, false_label) => {
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self.load_temp(*cond);
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// BNE true; JMP false
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self.emit(BNE, AM::LabelRelative(format!("__ir_blk_{true_label}")));
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self.emit(JMP, AM::Label(format!("__ir_blk_{false_label}")));
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}
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IrTerminator::Return(value) => {
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if let Some(v) = value {
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self.load_temp(*v);
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}
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self.emit(RTS, AM::Implied);
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}
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IrTerminator::Unreachable => {
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// Generate a BRK just in case
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self.emit(BRK, AM::Implied);
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}
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}
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}
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}
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#[derive(Debug, Clone, Copy)]
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enum CmpKind {
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Eq,
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Ne,
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Lt,
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Gt,
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||||
LtEq,
|
||||
GtEq,
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
use crate::analyzer;
|
||||
use crate::ir;
|
||||
use crate::parser;
|
||||
|
||||
fn lower_and_gen(source: &str) -> Vec<Instruction> {
|
||||
let (prog, _) = parser::parse(source);
|
||||
let prog = prog.unwrap();
|
||||
let analysis = analyzer::analyze(&prog);
|
||||
let ir_program = ir::lower(&prog, &analysis);
|
||||
IrCodeGen::new(&analysis.var_allocations, &ir_program).generate(&ir_program)
|
||||
}
|
||||
|
||||
fn has_instruction(insts: &[Instruction], opcode: crate::asm::Opcode, mode: &AM) -> bool {
|
||||
insts.iter().any(|i| i.opcode == opcode && i.mode == *mode)
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_minimal_program() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var x: u8 = 42
|
||||
on frame { x = 1 }
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should initialize x = 42
|
||||
assert!(has_instruction(&insts, LDA, &AM::Immediate(42)));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_plus_assign() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var x: u8 = 0
|
||||
on frame { x += 5 }
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should emit CLC + ADC for the add
|
||||
assert!(has_instruction(&insts, CLC, &AM::Implied));
|
||||
assert!(insts.iter().any(|i| i.opcode == ADC));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_draw_sprite() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var px: u8 = 0
|
||||
var py: u8 = 0
|
||||
on frame { draw Smiley at: (px, py) }
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should write to OAM slot 0
|
||||
assert!(has_instruction(&insts, STA, &AM::Absolute(0x0200)));
|
||||
assert!(has_instruction(&insts, STA, &AM::Absolute(0x0203)));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_wait_frame() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
on frame { wait_frame }
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should poll frame flag
|
||||
assert!(has_instruction(&insts, LDA, &AM::ZeroPage(0x00)));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_button_read() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var x: u8 = 0
|
||||
on frame {
|
||||
if button.right { x += 1 }
|
||||
}
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should read input byte
|
||||
assert!(has_instruction(&insts, LDA, &AM::ZeroPage(0x01)));
|
||||
// Should AND with mask
|
||||
assert!(insts.iter().any(|i| i.opcode == AND));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_while_loop() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var x: u8 = 0
|
||||
on frame {
|
||||
while x < 10 { x += 1 }
|
||||
}
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should emit CMP + conditional branch
|
||||
assert!(insts.iter().any(|i| i.opcode == CMP));
|
||||
assert!(insts.iter().any(|i| i.opcode == JMP || i.opcode == BNE));
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_if_branch() {
|
||||
let insts = lower_and_gen(
|
||||
r#"
|
||||
game "T" { mapper: NROM }
|
||||
var x: u8 = 0
|
||||
on frame {
|
||||
if x == 0 { x = 1 }
|
||||
}
|
||||
start Main
|
||||
"#,
|
||||
);
|
||||
// Should emit CMP + branch
|
||||
assert!(insts.iter().any(|i| i.opcode == CMP));
|
||||
}
|
||||
}
|
||||
|
|
@ -1,6 +1,10 @@
|
|||
pub mod ir_codegen;
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests;
|
||||
|
||||
pub use ir_codegen::IrCodeGen;
|
||||
|
||||
use std::collections::HashMap;
|
||||
|
||||
use crate::analyzer::VarAllocation;
|
||||
|
|
|
|||
|
|
@ -534,13 +534,15 @@ impl LoweringContext {
|
|||
t
|
||||
}
|
||||
Expr::ButtonRead(_, button, _) => {
|
||||
// Button reads are lowered to a ReadInput + mask check
|
||||
self.emit(IrOp::ReadInput);
|
||||
let t = self.fresh_temp();
|
||||
// Button reads: read the input byte, mask with the button bit.
|
||||
// (Player selection is ignored here; IR codegen handles it.)
|
||||
let input = self.fresh_temp();
|
||||
self.emit(IrOp::ReadInput(input));
|
||||
let mask = button_mask(button);
|
||||
let mask_temp = self.fresh_temp();
|
||||
self.emit(IrOp::LoadImm(mask_temp, mask));
|
||||
self.emit(IrOp::And(t, t, mask_temp));
|
||||
let t = self.fresh_temp();
|
||||
self.emit(IrOp::And(t, input, mask_temp));
|
||||
t
|
||||
}
|
||||
Expr::ArrayLiteral(_, _) => {
|
||||
|
|
@ -593,6 +595,14 @@ impl LoweringContext {
|
|||
t
|
||||
}
|
||||
|
||||
/// Emit an IR "move" from `src` to `dest`: `dest = src | 0`.
|
||||
/// Used to merge values from different control-flow paths.
|
||||
fn emit_move(&mut self, dest: IrTemp, src: IrTemp) {
|
||||
let zero = self.fresh_temp();
|
||||
self.emit(IrOp::LoadImm(zero, 0));
|
||||
self.emit(IrOp::Or(dest, src, zero));
|
||||
}
|
||||
|
||||
fn lower_logical_and(&mut self, left: &Expr, right: &Expr) -> IrTemp {
|
||||
let result = self.fresh_temp();
|
||||
let right_label = self.fresh_label("and_right");
|
||||
|
|
@ -609,7 +619,7 @@ impl LoweringContext {
|
|||
// Right side (only evaluated if left is true)
|
||||
self.start_block(&right_label);
|
||||
let r = self.lower_expr(right);
|
||||
self.emit(IrOp::StoreVar(VarId(self.next_var_id), r)); // temp storage
|
||||
self.emit_move(result, r);
|
||||
self.end_block(IrTerminator::Jump(end_label.clone()));
|
||||
|
||||
// False path
|
||||
|
|
@ -643,7 +653,7 @@ impl LoweringContext {
|
|||
// Right side
|
||||
self.start_block(&right_label);
|
||||
let r = self.lower_expr(right);
|
||||
self.emit(IrOp::StoreVar(VarId(self.next_var_id), r));
|
||||
self.emit_move(result, r);
|
||||
self.end_block(IrTerminator::Jump(end_label.clone()));
|
||||
|
||||
// Merge
|
||||
|
|
|
|||
|
|
@ -120,7 +120,8 @@ pub enum IrOp {
|
|||
y: IrTemp,
|
||||
frame: Option<IrTemp>,
|
||||
},
|
||||
ReadInput,
|
||||
/// Read the current player 1 input byte into a temp.
|
||||
ReadInput(IrTemp),
|
||||
WaitFrame,
|
||||
Transition(String),
|
||||
|
||||
|
|
|
|||
|
|
@ -152,7 +152,7 @@ fn lower_button_read() {
|
|||
.blocks
|
||||
.iter()
|
||||
.flat_map(|b| &b.ops)
|
||||
.any(|op| matches!(op, IrOp::ReadInput));
|
||||
.any(|op| matches!(op, IrOp::ReadInput(_)));
|
||||
assert!(has_input, "button read should emit ReadInput op");
|
||||
}
|
||||
|
||||
|
|
|
|||
27
src/main.rs
27
src/main.rs
|
|
@ -28,6 +28,11 @@ enum Cli {
|
|||
/// Dump generated 6502 assembly to stdout
|
||||
#[arg(long)]
|
||||
asm_dump: bool,
|
||||
|
||||
/// Use the experimental IR-based codegen instead of the
|
||||
/// AST-based codegen. Enables optimizer passes on the output.
|
||||
#[arg(long)]
|
||||
use_ir: bool,
|
||||
},
|
||||
/// Type-check a source file without building
|
||||
Check {
|
||||
|
|
@ -45,9 +50,10 @@ fn main() {
|
|||
output,
|
||||
debug,
|
||||
asm_dump,
|
||||
use_ir,
|
||||
} => {
|
||||
let output = output.unwrap_or_else(|| input.with_extension("nes"));
|
||||
match compile(&input, debug, asm_dump) {
|
||||
match compile(&input, debug, asm_dump, use_ir) {
|
||||
Ok(rom) => {
|
||||
std::fs::write(&output, rom).unwrap_or_else(|e| {
|
||||
eprintln!("error: failed to write {}: {e}", output.display());
|
||||
|
|
@ -80,7 +86,7 @@ fn dump_asm(instructions: &[nescript::asm::Instruction]) {
|
|||
}
|
||||
}
|
||||
|
||||
fn compile(input: &PathBuf, debug: bool, asm_dump: bool) -> Result<Vec<u8>, ()> {
|
||||
fn compile(input: &PathBuf, debug: bool, asm_dump: bool, use_ir: bool) -> Result<Vec<u8>, ()> {
|
||||
let raw_source = std::fs::read_to_string(input).map_err(|e| {
|
||||
eprintln!("error: failed to read {}: {e}", input.display());
|
||||
})?;
|
||||
|
|
@ -129,11 +135,18 @@ fn compile(input: &PathBuf, debug: bool, asm_dump: bool) -> Result<Vec<u8>, ()>
|
|||
eprintln!("error: {e}");
|
||||
})?;
|
||||
|
||||
// Code generation (still AST-based for M2; IR codegen comes in M3)
|
||||
let codegen = CodeGen::new(&analysis.var_allocations, &program.constants)
|
||||
.with_sprites(&sprites)
|
||||
.with_debug(debug);
|
||||
let instructions = codegen.generate(&program);
|
||||
// Code generation: choose between IR-based and AST-based codegen.
|
||||
let instructions = if use_ir {
|
||||
use nescript::codegen::IrCodeGen;
|
||||
IrCodeGen::new(&analysis.var_allocations, &ir_program)
|
||||
.with_sprites(&sprites)
|
||||
.generate(&ir_program)
|
||||
} else {
|
||||
CodeGen::new(&analysis.var_allocations, &program.constants)
|
||||
.with_sprites(&sprites)
|
||||
.with_debug(debug)
|
||||
.generate(&program)
|
||||
};
|
||||
|
||||
if asm_dump {
|
||||
dump_asm(&instructions);
|
||||
|
|
|
|||
|
|
@ -379,7 +379,7 @@ fn collect_source_temps(op: &IrOp, used: &mut HashSet<IrTemp>) {
|
|||
used.insert(*f);
|
||||
}
|
||||
}
|
||||
IrOp::ReadInput | IrOp::WaitFrame | IrOp::Transition(_) | IrOp::SourceLoc(_) => {}
|
||||
IrOp::ReadInput(_) | IrOp::WaitFrame | IrOp::Transition(_) | IrOp::SourceLoc(_) => {}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -406,10 +406,10 @@ fn op_dest(op: &IrOp) -> Option<IrTemp> {
|
|||
| IrOp::CmpGtEq(d, _, _)
|
||||
| IrOp::ArrayLoad(d, _, _) => Some(*d),
|
||||
IrOp::Call(dest, _, _) => *dest,
|
||||
IrOp::ReadInput(d) => Some(*d),
|
||||
IrOp::StoreVar(_, _)
|
||||
| IrOp::ArrayStore(_, _, _)
|
||||
| IrOp::DrawSprite { .. }
|
||||
| IrOp::ReadInput
|
||||
| IrOp::WaitFrame
|
||||
| IrOp::Transition(_)
|
||||
| IrOp::SourceLoc(_) => None,
|
||||
|
|
|
|||
|
|
@ -482,3 +482,69 @@ fn program_with_mmc1() {
|
|||
let info = rom::validate_ines(&rom_data).expect("should be valid iNES");
|
||||
assert_eq!(info.mapper, 1, "should be MMC1 (mapper 1)");
|
||||
}
|
||||
|
||||
// ── IR Codegen Tests ──
|
||||
|
||||
/// Compile a program using the IR-based codegen path instead of the
|
||||
/// AST-based codegen. Validates the full IR pipeline produces a valid ROM.
|
||||
fn compile_with_ir_codegen(source: &str) -> Vec<u8> {
|
||||
use nescript::codegen::IrCodeGen;
|
||||
|
||||
let (program, diags) = nescript::parser::parse(source);
|
||||
assert!(
|
||||
diags.is_empty(),
|
||||
"unexpected parse errors: {diags:?}\nsource:\n{source}"
|
||||
);
|
||||
let program = program.expect("parse should succeed");
|
||||
|
||||
let analysis = analyzer::analyze(&program);
|
||||
assert!(
|
||||
analysis.diagnostics.iter().all(|d| !d.is_error()),
|
||||
"unexpected analysis errors: {:?}",
|
||||
analysis.diagnostics
|
||||
);
|
||||
|
||||
// Lower to IR and run the optimizer
|
||||
let mut ir_program = ir::lower(&program, &analysis);
|
||||
optimizer::optimize(&mut ir_program);
|
||||
|
||||
// IR-based codegen
|
||||
let codegen = IrCodeGen::new(&analysis.var_allocations, &ir_program);
|
||||
let instructions = codegen.generate(&ir_program);
|
||||
|
||||
// Link into a ROM
|
||||
let linker = Linker::new(program.game.mirroring);
|
||||
linker.link(&instructions)
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_minimal_rom() {
|
||||
let source = r#"
|
||||
game "IR Test" { mapper: NROM }
|
||||
var x: u8 = 42
|
||||
on frame { wait_frame }
|
||||
start Main
|
||||
"#;
|
||||
let rom_data = compile_with_ir_codegen(source);
|
||||
let info = rom::validate_ines(&rom_data).expect("should be valid iNES");
|
||||
assert_eq!(info.mapper, 0);
|
||||
assert_eq!(rom_data.len(), 16 + 16384 + 8192);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ir_codegen_full_pipeline() {
|
||||
let source = r#"
|
||||
game "IR Full" { mapper: NROM }
|
||||
var x: u8 = 0
|
||||
var y: u8 = 0
|
||||
on frame {
|
||||
if button.right { x += 1 }
|
||||
if button.left { x -= 1 }
|
||||
if x > 100 { x = 0 }
|
||||
draw Smiley at: (x, y)
|
||||
}
|
||||
start Main
|
||||
"#;
|
||||
let rom_data = compile_with_ir_codegen(source);
|
||||
rom::validate_ines(&rom_data).expect("should be valid iNES");
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue