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https://github.com/imjasonh/nescript
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Implement NEScript compiler Milestone 1 ("Hello Sprite")
Complete implementation of the NEScript compiler pipeline for M1: - Lexer: full tokenization with hex/binary/decimal literals, all keywords, operators - Parser: recursive descent with Pratt expression parsing (M1 subset) - Analyzer: symbol resolution, type checking, memory allocation - 6502 Assembler: full opcode encoding table (~150 valid combinations) - Code Generator: AST → 6502 instructions (direct, no IR for M1) - Runtime: NES hardware init, NMI handler, controller read, OAM DMA - Linker: NROM layout, vector table, palette loading, CHR data - ROM Builder: iNES header generation, PRG/CHR padding - CLI: `build` and `check` subcommands via clap 143 tests across all modules: - 22 lexer tests (literals, keywords, operators, error recovery) - 18 parser tests (expressions, statements, game structure, errors) - 7 analyzer tests (symbol resolution, memory allocation, transitions) - 30 assembler tests (every addressing mode, label resolution) - 7 codegen tests (var init, arithmetic, buttons, draw, comparisons) - 11 runtime tests (init sequence, NMI handler, controller read) - 10 ROM builder tests (iNES format, mirroring, banking, validation) - 5 linker tests (vector table, CHR data, palette loading) - 7 integration tests (end-to-end compilation, error detection) CI: GitHub Actions for check, fmt, clippy, test Pre-commit: script for local fmt + clippy + test validation https://claude.ai/code/session_01W6eQFStA66EuMKHUFo2rx3
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Claude
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145
src/runtime/mod.rs
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145
src/runtime/mod.rs
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#[cfg(test)]
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mod tests;
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use crate::asm::{AddressingMode as AM, Instruction, Opcode::*};
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/// PPU register addresses
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const PPU_CTRL: u16 = 0x2000;
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const PPU_MASK: u16 = 0x2001;
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const PPU_STATUS: u16 = 0x2002;
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const OAM_ADDR: u16 = 0x2003;
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const OAM_DMA: u16 = 0x4014;
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const APU_STATUS: u16 = 0x4015;
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const JOY1: u16 = 0x4016;
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const APU_FRAME: u16 = 0x4017;
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/// Zero-page locations used by the runtime.
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pub const ZP_FRAME_FLAG: u8 = 0x00;
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pub const ZP_INPUT_P1: u8 = 0x01;
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/// Generate the NES hardware initialization sequence.
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/// This runs at RESET and sets up the hardware before user code.
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pub fn gen_init() -> Vec<Instruction> {
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let mut out = Vec::new();
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// Disable IRQs and set decimal mode off
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out.push(Instruction::implied(SEI));
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out.push(Instruction::implied(CLD));
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// Disable APU frame counter IRQ
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out.push(Instruction::new(LDX, AM::Immediate(0x40)));
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out.push(Instruction::new(STX, AM::Absolute(APU_FRAME)));
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// Set up stack at $01FF
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out.push(Instruction::new(LDX, AM::Immediate(0xFF)));
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out.push(Instruction::implied(TXS));
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// Disable PPU rendering
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out.push(Instruction::new(LDA, AM::Immediate(0x00)));
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out.push(Instruction::new(STA, AM::Absolute(PPU_CTRL)));
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out.push(Instruction::new(STA, AM::Absolute(PPU_MASK)));
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// Disable DMC IRQs
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out.push(Instruction::new(STA, AM::Absolute(APU_STATUS)));
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// Wait for first vblank
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// vblankwait1:
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out.push(Instruction::new(NOP, AM::Label("__vblankwait1".into())));
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out.push(Instruction::new(BIT, AM::Absolute(PPU_STATUS)));
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out.push(Instruction::new(
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BPL,
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AM::LabelRelative("__vblankwait1".into()),
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));
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// Clear RAM ($0000-$07FF)
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out.push(Instruction::new(LDA, AM::Immediate(0x00)));
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out.push(Instruction::new(LDX, AM::Immediate(0x00)));
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out.push(Instruction::new(NOP, AM::Label("__clrmem".into())));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0000)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0100)));
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// OAM shadow: fill with $FE (hide sprites off-screen)
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out.push(Instruction::new(LDA, AM::Immediate(0xFE)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0200)));
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out.push(Instruction::new(LDA, AM::Immediate(0x00)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0300)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0400)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0500)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0600)));
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out.push(Instruction::new(STA, AM::AbsoluteX(0x0700)));
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out.push(Instruction::implied(INX));
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out.push(Instruction::new(BNE, AM::LabelRelative("__clrmem".into())));
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// Wait for second vblank
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out.push(Instruction::new(NOP, AM::Label("__vblankwait2".into())));
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out.push(Instruction::new(BIT, AM::Absolute(PPU_STATUS)));
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out.push(Instruction::new(
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BPL,
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AM::LabelRelative("__vblankwait2".into()),
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));
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// Enable PPU (sprites from pattern table 0, enable NMI)
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out.push(Instruction::new(LDA, AM::Immediate(0x80))); // enable NMI
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out.push(Instruction::new(STA, AM::Absolute(PPU_CTRL)));
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out.push(Instruction::new(LDA, AM::Immediate(0x10))); // show sprites
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out.push(Instruction::new(STA, AM::Absolute(PPU_MASK)));
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out
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}
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/// Generate the NMI handler.
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/// Called every vblank by the NES hardware.
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pub fn gen_nmi() -> Vec<Instruction> {
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let mut out = Vec::new();
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// Save registers
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out.push(Instruction::implied(PHA));
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out.push(Instruction::implied(TXA));
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out.push(Instruction::implied(PHA));
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out.push(Instruction::implied(TYA));
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out.push(Instruction::implied(PHA));
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// OAM DMA — transfer sprite data from $0200
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out.push(Instruction::new(LDA, AM::Immediate(0x00)));
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out.push(Instruction::new(STA, AM::Absolute(OAM_ADDR)));
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out.push(Instruction::new(LDA, AM::Immediate(0x02)));
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out.push(Instruction::new(STA, AM::Absolute(OAM_DMA)));
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// Read controller 1
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out.push(Instruction::new(LDA, AM::Immediate(0x01)));
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out.push(Instruction::new(STA, AM::Absolute(JOY1)));
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out.push(Instruction::new(LDA, AM::Immediate(0x00)));
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out.push(Instruction::new(STA, AM::Absolute(JOY1)));
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// Read 8 button bits into ZP_INPUT_P1
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out.push(Instruction::new(LDX, AM::Immediate(0x08)));
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out.push(Instruction::new(NOP, AM::Label("__read_input".into())));
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out.push(Instruction::new(LDA, AM::Absolute(JOY1)));
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out.push(Instruction::new(LSR, AM::Accumulator));
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out.push(Instruction::new(ROL, AM::ZeroPage(ZP_INPUT_P1)));
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out.push(Instruction::implied(DEX));
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out.push(Instruction::new(
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BNE,
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AM::LabelRelative("__read_input".into()),
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));
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// Set frame-ready flag
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out.push(Instruction::new(LDA, AM::Immediate(0x01)));
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out.push(Instruction::new(STA, AM::ZeroPage(ZP_FRAME_FLAG)));
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// Restore registers
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out.push(Instruction::implied(PLA));
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out.push(Instruction::implied(TAY));
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out.push(Instruction::implied(PLA));
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out.push(Instruction::implied(TAX));
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out.push(Instruction::implied(PLA));
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// Return from interrupt
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out.push(Instruction::implied(RTI));
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out
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}
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/// Generate the IRQ handler (just RTI for now).
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pub fn gen_irq() -> Vec<Instruction> {
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vec![Instruction::implied(RTI)]
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}
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132
src/runtime/tests.rs
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132
src/runtime/tests.rs
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use super::*;
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use crate::asm;
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use crate::asm::{AddressingMode as AM, Opcode::*};
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#[test]
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fn init_disables_irq() {
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let init = gen_init();
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assert_eq!(init[0].opcode, SEI);
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}
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#[test]
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fn init_sets_stack_pointer() {
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let init = gen_init();
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// LDX #$FF, TXS
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let has_ldx = init
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.iter()
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.any(|i| i.opcode == LDX && i.mode == AM::Immediate(0xFF));
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let has_txs = init.iter().any(|i| i.opcode == TXS);
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assert!(has_ldx, "should load $FF into X");
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assert!(has_txs, "should transfer X to stack pointer");
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}
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#[test]
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fn init_disables_ppu() {
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let init = gen_init();
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// Should write 0 to $2000 and $2001
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let writes_ppu_ctrl = init
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::Absolute(0x2000));
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let writes_ppu_mask = init
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::Absolute(0x2001));
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assert!(writes_ppu_ctrl, "should disable PPU control");
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assert!(writes_ppu_mask, "should disable PPU mask");
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}
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#[test]
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fn init_enables_nmi_at_end() {
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let init = gen_init();
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// Last STA $2000 should enable NMI (bit 7 set = 0x80)
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let nmi_writes: Vec<_> = init
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.iter()
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.enumerate()
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.filter(|(_, i)| i.opcode == STA && i.mode == AM::Absolute(0x2000))
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.collect();
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assert!(
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nmi_writes.len() >= 2,
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"should write to PPU_CTRL at least twice"
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);
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// The last write should be preceded by LDA #$80
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let last_write_idx = nmi_writes.last().unwrap().0;
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assert!(last_write_idx > 0);
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assert_eq!(init[last_write_idx - 1].opcode, LDA);
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assert_eq!(init[last_write_idx - 1].mode, AM::Immediate(0x80));
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}
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#[test]
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fn init_assembles_without_error() {
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let init = gen_init();
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let result = asm::assemble(&init, 0x8000);
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// Should produce non-empty output
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assert!(!result.bytes.is_empty(), "init should produce bytes");
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// Should be under 200 bytes (the plan estimates ~80)
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assert!(
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result.bytes.len() < 200,
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"init is {} bytes, expected < 200",
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result.bytes.len()
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);
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}
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#[test]
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fn nmi_saves_and_restores_registers() {
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let nmi = gen_nmi();
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// First three instructions should push A, X, Y
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assert_eq!(nmi[0].opcode, PHA);
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assert_eq!(nmi[1].opcode, TXA);
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assert_eq!(nmi[2].opcode, PHA);
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assert_eq!(nmi[3].opcode, TYA);
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assert_eq!(nmi[4].opcode, PHA);
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// Last instructions should restore and RTI
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let len = nmi.len();
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assert_eq!(nmi[len - 1].opcode, RTI);
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assert_eq!(nmi[len - 2].opcode, PLA);
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}
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#[test]
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fn nmi_triggers_oam_dma() {
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let nmi = gen_nmi();
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let has_dma = nmi
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::Absolute(0x4014));
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assert!(has_dma, "NMI should trigger OAM DMA");
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}
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#[test]
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fn nmi_reads_controller() {
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let nmi = gen_nmi();
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// Should write strobe to $4016
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let has_strobe = nmi
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::Absolute(0x4016));
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assert!(has_strobe, "NMI should strobe controller");
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}
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#[test]
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fn nmi_sets_frame_flag() {
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let nmi = gen_nmi();
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let has_flag = nmi
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::ZeroPage(ZP_FRAME_FLAG));
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assert!(has_flag, "NMI should set frame-ready flag");
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}
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#[test]
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fn nmi_assembles_without_error() {
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let nmi = gen_nmi();
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let result = asm::assemble(&nmi, 0xF000);
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assert!(!result.bytes.is_empty());
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assert!(
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result.bytes.len() < 150,
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"NMI handler is {} bytes, expected < 150",
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result.bytes.len()
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);
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}
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#[test]
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fn irq_handler_is_just_rti() {
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let irq = gen_irq();
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assert_eq!(irq.len(), 1);
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assert_eq!(irq[0].opcode, RTI);
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}
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