Codegen: peephole pass for redundant STA/LDA pairs

Adds src/codegen/peephole.rs with two passes that run to fixed point
after codegen:
- \`STA slot; LDA slot\` over an IR temp (\$80-\$FF): the LDA is
  redundant since A already holds the value. Dropped.
- \`LDA addr; STA addr\` (same address): the STA is a no-op since
  the byte was just loaded from that slot. Dropped.

Conservative on user variables (not IR temps) so intervening IRQs or
function calls can't invalidate the optimization. This is the biggest
single win for IR codegen output quality, since IR codegen currently
stores every temp to ZP regardless of reuse.

https://claude.ai/code/session_01W6eQFStA66EuMKHUFo2rx3

src/main.rs

@@ -137,7 +137,7 @@ fn compile(input: &PathBuf, debug: bool, asm_dump: bool, use_ast: bool) -> Resul
 
     // Code generation: IR-based is the default. `--use-ast` switches to
     // the legacy AST-based codegen for comparison and fallback.
-    let instructions = if use_ast {
+    let mut instructions = if use_ast {
         CodeGen::new(&analysis.var_allocations, &program.constants)
             .with_sprites(&sprites)
             .with_debug(debug)
@@ -149,6 +149,11 @@ fn compile(input: &PathBuf, debug: bool, asm_dump: bool, use_ast: bool) -> Resul
             .generate(&ir_program)
     };
 
+    // Peephole optimization: cheap pass that removes redundant
+    // store-then-load pairs over IR temp slots. Biggest win for the
+    // IR codegen, but safe for the AST codegen too.
+    nescript::codegen::peephole::optimize(&mut instructions);
+
     if asm_dump {
         dump_asm(&instructions);
     }