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codereview: address four residual concerns from the hardware review
- Analyzer: new `W0108` warning when an array's byte size exceeds 256. The codegen lowers `arr[i]` to `LDA base,X` and the 6502's X register is 8 bits, so elements past byte 255 are unreachable. The old debug bounds check silently skipped arrays in that range; it now clamps the compare to 255 and the analyzer diagnoses the declaration up front. - UxROM `__bank_select`: the routine previously wrote the bank number to a fixed `$FFF0`, which works on emulators that don't simulate bus conflicts (jsnes, Mesen permissive) but is broken on real hardware because a single ROM byte can't match every possible bank number. Fixed by `TAX; STA __bank_select_table,X` — the store lands at `table + bank_num`, whose ROM byte is exactly `bank_num`, so CPU bus = A = ROM = no conflict. New `LabelAbsoluteX` addressing-mode variant in the assembler resolves the table's base address through the existing fixup pass. The two existing UxROM example ROMs shift a few bytes but their goldens still match (jsnes is bus-conflict-permissive). - Source maps: new `source_map_survives_aggressive_peephole_folding` regression test. The reviewer was worried peephole could drop `__src_<N>` labels and silently leave stale source-map entries. Peephole actually treats labels as block boundaries and never deletes them — the test pins that down by compiling a program tailored to trip every peephole fold and asserting every codegen-recorded source marker survives into the final linker label table. - Frame-overrun counter: new `debug_frame_overrun_counter_reads_back_from_user_code` end-to-end test that proves the contract works: NMI emits `INC $07FF`, user `peek(0x07FF)` lowers to `LDA $07FF`, and the RAM allocator doesn't hand out `$07FF` to a user variable. https://claude.ai/code/session_01MaNVcDmK9gsspRkdxowQAM
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11 changed files with 354 additions and 20 deletions
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@ -1455,11 +1455,28 @@ pub fn gen_bank_select(mapper: Mapper) -> Vec<Instruction> {
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out.push(Instruction::implied(RTS));
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}
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Mapper::UxROM => {
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// UxROM: write bank number to any address in $8000-$FFFF.
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// We use $FFF0 so the write lands in the fixed bank's
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// tail area where the linker can back it with a matching
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// bank-table byte to avoid bus conflicts.
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out.push(Instruction::new(STA, AM::Absolute(0xFFF0)));
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// UxROM: write the bank number to any address in
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// $8000-$FFFF. On boards with bus conflicts the CPU's
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// write and the ROM byte at that address are ANDed on
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// the data bus, so we must write to an address whose
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// ROM byte already equals the bank number. The linker
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// splices a 256-byte table (`__bank_select_table`,
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// bytes 0..255) into the fixed bank, and we index into
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// it with X = bank number: `STA __bank_select_table, X`
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// stores A (= bank number) at
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// `__bank_select_table + X`, whose ROM byte is exactly
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// X, so bus = A = X = ROM — no conflict.
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//
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// Previously this wrote to a fixed `$FFF0`, which
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// happens to work on emulators that don't simulate bus
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// conflicts (jsnes, Mesen permissive) but would glitch
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// on real hardware because a single ROM byte can't
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// match every possible bank number.
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out.push(Instruction::implied(TAX));
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out.push(Instruction::new(
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STA,
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AM::LabelAbsoluteX("__bank_select_table".into()),
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));
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out.push(Instruction::implied(RTS));
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}
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Mapper::MMC3 => {
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@ -674,14 +674,32 @@ fn bank_select_mmc1_serializes_five_bits_to_e000() {
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}
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#[test]
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fn bank_select_uxrom_writes_fff0() {
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// UxROM bank-select writes A to $FFF0, which lives in the
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// fixed bank's bus-conflict-safe table.
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fn bank_select_uxrom_uses_bus_conflict_table() {
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// UxROM bank-select has to write to a ROM address whose byte
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// already equals the bank being selected. The routine does
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// `TAX; STA __bank_select_table, X` so the store goes to
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// `table + bank_num`, whose ROM byte is `bank_num` — making
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// the bus write match the ROM byte regardless of which bank
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// is being requested. We assert both pieces here so a
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// regression back to the broken `STA $FFF0` form fails
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// loudly.
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let sel = gen_bank_select(Mapper::UxROM);
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let has_write = sel
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let has_tax = sel.iter().any(|i| i.opcode == TAX && i.mode == AM::Implied);
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assert!(has_tax, "UxROM bank-select must TAX before the store");
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let has_indexed_store = sel.iter().any(|i| {
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i.opcode == STA && matches!(&i.mode, AM::LabelAbsoluteX(n) if n == "__bank_select_table")
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});
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assert!(
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has_indexed_store,
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"UxROM bank-select must `STA __bank_select_table,X`"
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);
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let writes_fff0 = sel
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.iter()
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.any(|i| i.opcode == STA && i.mode == AM::Absolute(0xFFF0));
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assert!(has_write, "UxROM bank-select must write to $FFF0");
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assert!(
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!writes_fff0,
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"UxROM bank-select must not fall back to the bus-conflict-unsafe STA $FFF0 form"
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);
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assert_eq!(sel.last().unwrap().opcode, RTS);
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}
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@ -723,7 +741,15 @@ fn bank_select_stashes_bank_number_in_zp() {
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#[test]
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fn bank_select_assembles_for_every_mapper() {
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for m in [Mapper::NROM, Mapper::MMC1, Mapper::UxROM, Mapper::MMC3] {
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let sel = gen_bank_select(m);
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let mut sel = gen_bank_select(m);
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// UxROM `gen_bank_select` references `__bank_select_table`
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// via `AM::LabelAbsoluteX`; give the assembler something
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// to resolve against in this standalone unit test. Real
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// linking appends the table in the linker pass, so the
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// label always resolves there.
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if m == Mapper::UxROM {
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sel.extend(super::gen_uxrom_bank_table());
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}
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let result = asm::assemble(&sel, 0xC000);
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assert!(
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!result.bytes.is_empty(),
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