mirror of
https://github.com/imjasonh/nescript
synced 2026-07-10 01:37:45 +00:00
Prior to this commit the linker always shipped a single 16 KB PRG
bank regardless of the declared mapper, so the README's MMC1/UxROM/
MMC3 support was aspirational. This commit gives the three banked
mappers a real multi-bank ROM layout:
* RomBuilder.set_prg_banks() writes any number of 16 KB banks
back-to-back so the iNES header reflects the true PRG size.
* Linker.link_banked() places switchable banks first, fixed bank
last, so the fixed bank maps to $C000-$FFFF (the address window
where vectors and the runtime live).
* runtime::gen_mapper_init() emits reset-time mapper config:
MMC1 serial-writes a control-register value that pins the last
bank at $C000 with the correct mirroring, UxROM relies on the
power-on default, MMC3 writes the $8000/$8001/$A000/$E000
registers to get a known PRG and mirroring state.
* runtime::gen_bank_select() is a mapper-specific subroutine
(callable with the target bank in A) that maps any physical
bank to $8000-$BFFF.
* runtime::gen_bank_trampoline() generates a cross-bank call
stub in the fixed bank that saves the caller's bank, switches,
JSRs the target, and restores the fixed bank.
* The CLI and integration helper thread declared `bank X: prg`
declarations through to the linker so MMC1/UxROM/MMC3 programs
actually produce multi-bank ROMs.
Coverage:
* Runtime unit tests (18 new): mapper init patterns for every
supported mapper, bank-select signatures, trampoline dispatch
order, UxROM bus-conflict table contents.
* RomBuilder tests (6 new): multi-bank layout, padding,
byte-level fidelity, per-bank size validation, legacy
single-bank fallback.
* Linker tests (13 new): multi-bank ROM sizes across MMC1/
UxROM/MMC3, fixed-bank placement, switchable-bank payload
fidelity, bank-select subroutine detection, NROM rejection
of switchable banks.
* Integration e2e tests (16 new): compile real .ne sources
through the full pipeline and assert on iNES headers,
mapper init signatures in the fixed bank, vector locations,
and a regression check against `examples/mmc1_banked.ne`.
Total: 474 tests pass under `cargo test` with
`RUSTFLAGS="-D warnings"`.
https://claude.ai/code/session_01UCressA5e8k1XsuoJYLav2
592 lines
23 KiB
Rust
592 lines
23 KiB
Rust
use super::*;
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use crate::asm::{AddressingMode as AM, Instruction, Opcode::*};
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use crate::parser::ast::{Mapper, Mirroring};
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use crate::rom;
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#[test]
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fn link_produces_valid_ines() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![
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Instruction::new(NOP, AM::Label("__main_loop".into())),
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Instruction::implied(NOP),
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Instruction::new(JMP, AM::Label("__main_loop".into())),
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];
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let rom_data = linker.link(&user_code);
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let info = rom::validate_ines(&rom_data).unwrap();
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assert_eq!(info.prg_banks, 1);
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assert_eq!(info.chr_banks, 1);
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assert_eq!(info.mapper, 0);
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}
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#[test]
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fn link_has_correct_vector_table() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let rom_data = linker.link(&user_code);
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// Vector table is at the last 6 bytes of PRG ROM
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// PRG starts at offset 16 in the .nes file
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let prg_end = 16 + 16384;
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let vector_start = prg_end - 6;
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// NMI vector (2 bytes, little-endian)
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let nmi = u16::from_le_bytes([rom_data[vector_start], rom_data[vector_start + 1]]);
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// RESET vector
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let reset = u16::from_le_bytes([rom_data[vector_start + 2], rom_data[vector_start + 3]]);
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// IRQ vector
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let irq = u16::from_le_bytes([rom_data[vector_start + 4], rom_data[vector_start + 5]]);
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// All vectors should be in the $C000-$FFFF range
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assert!(nmi >= 0xC000, "NMI vector {nmi:#06X} should be >= $C000");
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assert!(
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reset >= 0xC000,
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"RESET vector {reset:#06X} should be >= $C000"
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);
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assert!(irq >= 0xC000, "IRQ vector {irq:#06X} should be >= $C000");
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// RESET should point to the start of code ($C000)
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assert_eq!(reset, 0xC000, "RESET should point to $C000");
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}
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#[test]
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fn link_includes_chr_data() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let rom_data = linker.link(&user_code);
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// CHR starts after PRG
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let chr_start = 16 + 16384;
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// First 16 bytes should be the smiley sprite
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assert_ne!(
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&rom_data[chr_start..chr_start + 16],
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&[0u8; 16],
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"CHR data should contain sprite tile"
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);
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}
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#[test]
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fn link_rom_size_correct() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let rom_data = linker.link(&user_code);
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// 16 header + 16384 PRG + 8192 CHR
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assert_eq!(rom_data.len(), 16 + 16384 + 8192);
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}
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#[test]
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fn link_with_sprites_places_chr_data() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let sprite_bytes: Vec<u8> = (0x20..0x30).collect(); // 16 bytes, one tile
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let sprites = vec![SpriteData {
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name: "Player".into(),
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tile_index: 1,
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chr_bytes: sprite_bytes.clone(),
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}];
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let rom_data = linker.link_with_assets(&user_code, &sprites);
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// CHR starts right after the 16-byte iNES header and 16 KB PRG bank.
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let chr_start = 16 + 16384;
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// Tile 0 should still contain the built-in smiley (first 16 bytes, not
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// all zero).
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let tile0 = &rom_data[chr_start..chr_start + 16];
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assert_ne!(
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tile0, &[0u8; 16],
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"default smiley should occupy tile index 0",
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);
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// Tile 1 (CHR offset 16) should contain the sprite's CHR bytes exactly.
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let tile1 = &rom_data[chr_start + 16..chr_start + 32];
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assert_eq!(tile1, sprite_bytes.as_slice());
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// Tile 2 and beyond should be untouched (all zeros).
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let tile2 = &rom_data[chr_start + 32..chr_start + 48];
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assert_eq!(tile2, &[0u8; 16]);
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}
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#[test]
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fn link_with_sprites_spanning_multiple_tiles() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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// 32 bytes = 2 tiles. The linker should place them consecutively
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// starting at the requested tile index.
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let sprite_bytes: Vec<u8> = (0..32).collect();
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let sprites = vec![SpriteData {
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name: "Big".into(),
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tile_index: 4,
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chr_bytes: sprite_bytes.clone(),
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}];
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let rom_data = linker.link_with_assets(&user_code, &sprites);
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let chr_start = 16 + 16384;
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// Tile 4 starts at CHR offset 64.
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let placed = &rom_data[chr_start + 64..chr_start + 64 + 32];
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assert_eq!(placed, sprite_bytes.as_slice());
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}
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#[test]
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fn link_splices_audio_tick_when_user_marker_present() {
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// When user code contains the `__audio_used` marker label (the
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// IR codegen emits this whenever it sees a `play`/`start_music`/
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// `stop_music` op), the linker must splice a `JSR __audio_tick`
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// into the NMI handler prologue AND link in the audio driver
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// body so the JSR target exists.
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![
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// Pretend user code with the marker the codegen would emit.
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Instruction::new(NOP, AM::Label("__audio_used".into())),
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Instruction::implied(NOP),
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];
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let rom_data = linker.link(&user_code);
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// The ROM should be valid even with the splice — the driver
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// body has to fit in bank 0 without overflowing.
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let info = rom::validate_ines(&rom_data).unwrap();
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assert_eq!(info.prg_banks, 1);
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}
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#[test]
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fn link_omits_audio_tick_when_no_marker() {
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// User code without the marker should not pay any ROM cost
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// for the audio driver. We can't easily inspect bytes, but we
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// can at least verify the ROM builds and has a normal shape.
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let rom_data = linker.link(&user_code);
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let info = rom::validate_ines(&rom_data).unwrap();
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assert_eq!(info.prg_banks, 1);
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}
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#[test]
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fn link_with_audio_data_places_sfx_blobs_in_prg() {
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// When user code has the `__audio_used` marker AND we pass in
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// sfx data, the linker must:
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// 1. Splice in the audio tick (driver body)
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// 2. Splice in the period table
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// 3. Splice in the envelope blob under its label
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// 4. Resolve SymbolLo/SymbolHi references from user code to
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// the blob's address (second pass of the assembler)
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let linker = Linker::new(Mirroring::Horizontal);
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// User code: `LDA #<__sfx_test`, `STA $0C`, `LDA #>__sfx_test`,
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// `STA $0D` — simulates what IR codegen's gen_play_sfx emits.
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let user_code = vec![
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Instruction::new(NOP, AM::Label("__audio_used".into())),
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Instruction::new(LDA, AM::SymbolLo("__sfx_test".into())),
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Instruction::new(STA, AM::ZeroPage(0x0C)),
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Instruction::new(LDA, AM::SymbolHi("__sfx_test".into())),
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Instruction::new(STA, AM::ZeroPage(0x0D)),
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];
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let sfx = vec![SfxData {
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name: "test".into(),
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period_lo: 0x50,
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period_hi: 0x08,
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envelope: vec![0xBF, 0xB8, 0xB4, 0xB0, 0x00],
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}];
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let rom = linker.link_with_all_assets(&user_code, &[], &sfx, &[]);
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let info = rom::validate_ines(&rom).unwrap();
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assert_eq!(info.prg_banks, 1);
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// The envelope bytes must appear somewhere in PRG. Find them.
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let prg = &rom[16..16 + 16384];
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let needle = [0xBF, 0xB8, 0xB4, 0xB0, 0x00];
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let found = prg.windows(needle.len()).any(|w| w == needle);
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assert!(found, "sfx envelope bytes should be spliced into PRG ROM");
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}
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#[test]
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fn link_with_audio_data_places_music_stream_in_prg() {
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![
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Instruction::new(NOP, AM::Label("__audio_used".into())),
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Instruction::new(LDA, AM::SymbolLo("__music_test".into())),
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Instruction::new(STA, AM::ZeroPage(0x0E)),
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Instruction::new(LDA, AM::SymbolHi("__music_test".into())),
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Instruction::new(STA, AM::ZeroPage(0x0F)),
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];
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let music = vec![MusicData {
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name: "test".into(),
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header: 0xA9,
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stream: vec![37, 8, 41, 8, 44, 8, 0xFF, 0xFF],
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}];
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let rom = linker.link_with_all_assets(&user_code, &[], &[], &music);
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let prg = &rom[16..16 + 16384];
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let needle = [37, 8, 41, 8, 44, 8, 0xFF, 0xFF];
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let found = prg.windows(needle.len()).any(|w| w == needle);
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assert!(found, "music note stream should be spliced into PRG ROM");
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}
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#[test]
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fn link_with_audio_resolves_sfx_pointer_references() {
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// The SymbolLo/SymbolHi references in user code must get
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// fixed up to the *actual* PRG address of the envelope blob.
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// We can verify this by reading back the user code bytes and
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// checking that the LDA immediates point somewhere in the
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// valid PRG range ($C000-$FFFF).
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![
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Instruction::new(NOP, AM::Label("__audio_used".into())),
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Instruction::new(LDA, AM::SymbolLo("__sfx_test".into())),
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Instruction::new(LDA, AM::SymbolHi("__sfx_test".into())),
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];
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let sfx = vec![SfxData {
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name: "test".into(),
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period_lo: 0x50,
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period_hi: 0x08,
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envelope: vec![0xDE, 0xAD, 0xBE, 0xEF, 0x00],
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}];
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let rom = linker.link_with_all_assets(&user_code, &[], &sfx, &[]);
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// The user code starts at RESET ($C000) after init+palette_load.
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// Rather than compute the exact offset, verify the envelope
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// bytes appear at a byte that matches what the LDA immediate
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// pair would produce. We find the immediate pair by searching
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// for `A9 xx A9 yy` and checking `$xxyy` points at the needle.
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let prg = &rom[16..16 + 16384];
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let needle = [0xDE, 0xAD, 0xBE, 0xEF, 0x00];
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// Find where the envelope lives in ROM.
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let env_offset = prg
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.windows(needle.len())
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.position(|w| w == needle)
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.expect("envelope should be in PRG");
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let env_addr = 0xC000u16 + env_offset as u16;
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// Find any LDA-immediate pair that matches the envelope address.
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let lo = (env_addr & 0xFF) as u8;
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let hi = (env_addr >> 8) as u8;
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let pattern = [0xA9u8, lo, 0xA9, hi];
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let matched = prg.windows(pattern.len()).any(|w| w == pattern);
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assert!(
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matched,
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"should find `LDA #<env_addr; LDA #>env_addr` in PRG ($A9 ${lo:02X} $A9 ${hi:02X})"
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);
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}
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#[test]
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fn link_without_audio_marker_does_not_emit_period_table() {
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// Programs that never use audio must not pay the cost of the
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// period table, driver body, or any blobs. We verify this
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// indirectly: the `__period_table` label should NOT appear at
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// a distinct ROM address from the main body.
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let linker = Linker::new(Mirroring::Horizontal);
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let user_code = vec![Instruction::implied(NOP)];
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let rom = linker.link_with_all_assets(
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&user_code,
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&[],
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&[SfxData {
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name: "unused".into(),
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period_lo: 0,
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period_hi: 0,
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envelope: vec![0xAA, 0xBB, 0x00],
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}],
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&[],
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);
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// The envelope bytes `AA BB 00` must NOT appear in PRG — the
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// linker should have elided the whole audio section because
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// the marker is absent.
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let prg = &rom[16..16 + 16384];
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let needle = [0xAAu8, 0xBB, 0x00];
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let found = prg.windows(needle.len()).any(|w| w == needle);
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assert!(
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!found,
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"unused sfx data should not be spliced when __audio_used is absent"
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);
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}
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// ─── Banked linking ────────────────────────────────────────────────
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#[test]
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fn link_banked_mmc1_produces_multi_bank_rom() {
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// MMC1 with two switchable banks should produce a 3-bank ROM
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// (2 switchable + 1 fixed). The iNES header must report 3 PRG
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// banks, mapper number 1, and the file size must match.
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let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
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let user_code = vec![Instruction::implied(NOP)];
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let banks = vec![PrgBank::empty("Level1"), PrgBank::empty("Level2")];
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let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
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let info = rom::validate_ines(&rom).unwrap();
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assert_eq!(info.prg_banks, 3);
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assert_eq!(info.mapper, 1);
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assert_eq!(rom.len(), 16 + 3 * 16384 + 8192);
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}
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#[test]
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fn link_banked_uxrom_produces_multi_bank_rom() {
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let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::UxROM);
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let user_code = vec![Instruction::implied(NOP)];
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// Four switchable banks = 5 PRG banks total.
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let banks = vec![
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PrgBank::empty("BankA"),
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PrgBank::empty("BankB"),
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PrgBank::empty("BankC"),
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PrgBank::empty("BankD"),
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];
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let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
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let info = rom::validate_ines(&rom).unwrap();
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assert_eq!(info.prg_banks, 5);
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assert_eq!(info.mapper, 2);
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}
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#[test]
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fn link_banked_mmc3_produces_multi_bank_rom() {
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let linker = Linker::with_mapper(Mirroring::Vertical, Mapper::MMC3);
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let user_code = vec![Instruction::implied(NOP)];
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let banks = vec![
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PrgBank::empty("Stage1"),
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PrgBank::empty("Stage2"),
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PrgBank::empty("Stage3"),
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];
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let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
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let info = rom::validate_ines(&rom).unwrap();
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assert_eq!(info.prg_banks, 4);
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assert_eq!(info.mapper, 4);
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// Vertical mirroring must propagate through the builder.
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assert_eq!(info.mirroring, Mirroring::Vertical);
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}
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#[test]
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#[should_panic(expected = "NROM does not support switchable PRG banks")]
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fn link_banked_nrom_rejects_switchable_banks() {
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let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::NROM);
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let _ = linker.link_banked(
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&[Instruction::implied(NOP)],
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&[],
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&[],
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&[],
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&[PrgBank::empty("Nope")],
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);
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}
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#[test]
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fn link_banked_fixed_bank_lives_at_end_of_prg() {
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// The linker must place the fixed bank *last* so it maps to
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// $C000-$FFFF at reset. The vector table at $FFFA..$FFFF must
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// land in the final bank. We verify by reading the reset vector
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// and checking it points into the fixed bank's address window.
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let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
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let user_code = vec![Instruction::implied(NOP)];
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let banks = vec![PrgBank::empty("A"), PrgBank::empty("B")];
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let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
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// Three PRG banks = 48 KB; the fixed bank is the last 16 KB
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// slot in the file, and its $FFFA..$FFFF area holds the
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// vector table.
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let fixed_bank_offset = 16 + 2 * 16384;
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// Vectors live at the last 6 bytes of the fixed bank.
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let vec_offset = fixed_bank_offset + 16384 - 6;
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let reset = u16::from_le_bytes([rom[vec_offset + 2], rom[vec_offset + 3]]);
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assert!(
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reset >= 0xC000,
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"RESET vector {reset:#06X} should point into fixed bank ($C000-$FFFF)"
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);
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}
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#[test]
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fn link_banked_switchable_banks_are_padded_with_ff() {
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// Empty switchable banks should end up as 16 KB of $FF — the
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// same pad value the ROM builder uses for unset code. This is
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|
// important so banks are always a known shape regardless of
|
|
// payload.
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let banks = vec![PrgBank::empty("Empty")];
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
// Bank 0 is at offset 16; check a few bytes are $FF.
|
|
assert_eq!(rom[16], 0xFF);
|
|
assert_eq!(rom[16 + 100], 0xFF);
|
|
// Last byte of bank 0 (just before bank 1 begins).
|
|
assert_eq!(rom[16 + 16384 - 1], 0xFF);
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_preserves_switchable_bank_payload_bytes() {
|
|
// When a caller provides raw bytes for a switchable bank, the
|
|
// linker must splice them in verbatim at the start of that
|
|
// bank's slot. This is the hook the compiler uses to ship data
|
|
// tables without touching the fixed bank.
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::UxROM);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let data = vec![0xDE, 0xAD, 0xBE, 0xEF, 0x42, 0x13];
|
|
let banks = vec![PrgBank::with_data("DataBank", data.clone())];
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
// Bank 0 starts at offset 16. Verify payload lands at the very
|
|
// start.
|
|
assert_eq!(&rom[16..16 + data.len()], &data[..]);
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_fixed_bank_contains_bank_select_subroutine() {
|
|
// The linker must emit `__bank_select` (as labelled 6502 code)
|
|
// somewhere in the fixed bank whenever the mapper isn't NROM.
|
|
// We verify by assembling a minimal program and searching for
|
|
// the opcode signature of the MMC1 bank-select tail — 5 STAs
|
|
// to $E000 ($8D $00 $E0).
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let banks = vec![PrgBank::empty("Foo")];
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
// Fixed bank starts at offset 16 + 16384.
|
|
let fixed = &rom[16 + 16384..16 + 2 * 16384];
|
|
// Find five consecutive STA $E000 (opcode $8D operand $00 $E0)
|
|
// instructions with LSR A ($4A) between pairs. This is the
|
|
// signature pattern generated by `gen_bank_select(MMC1)`.
|
|
let sta_e000 = [0x8D, 0x00, 0xE0];
|
|
let lsr_then_sta_e000 = [0x4A, 0x8D, 0x00, 0xE0];
|
|
let has_tail = fixed
|
|
.windows(lsr_then_sta_e000.len())
|
|
.any(|w| w == lsr_then_sta_e000);
|
|
let sta_e000_count = fixed
|
|
.windows(sta_e000.len())
|
|
.filter(|w| w == &sta_e000)
|
|
.count();
|
|
assert!(
|
|
has_tail,
|
|
"MMC1 fixed bank should contain LSR A ; STA $E000 pattern"
|
|
);
|
|
assert!(
|
|
sta_e000_count >= 5,
|
|
"MMC1 fixed bank should contain >= 5 STA $E000 writes (bank-select + init), got {sta_e000_count}"
|
|
);
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_fixed_bank_contains_trampolines_for_declared_banks() {
|
|
// When a bank declares an entry label, the linker must emit a
|
|
// matching `__tramp_<name>` stub in the fixed bank. We check
|
|
// by constructing a bank with an entry label and verifying the
|
|
// assembled labels map (via the indirect check: the ROM builds
|
|
// without panicking on unresolved labels, which means the
|
|
// trampoline's target label — here spliced via a dummy NOP
|
|
// label in the fixed bank — resolved).
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
|
|
// We splice a fake target label into the user code so the
|
|
// trampoline's internal JSR resolves. This simulates the path
|
|
// codegen will eventually take (emit the entry label alongside
|
|
// the banked user code; the linker resolves it via the banked
|
|
// assembler).
|
|
let user_code = vec![
|
|
Instruction::new(NOP, AM::Label("__fake_bank_entry".into())),
|
|
Instruction::implied(NOP),
|
|
];
|
|
let banks = vec![PrgBank {
|
|
name: "Level1".into(),
|
|
data: Vec::new(),
|
|
entry_label: Some("__fake_bank_entry".into()),
|
|
}];
|
|
// Should not panic — trampoline and entry label both present.
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
let info = rom::validate_ines(&rom).unwrap();
|
|
assert_eq!(info.prg_banks, 2);
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_reset_vector_points_into_fixed_bank_window() {
|
|
// The reset vector must land somewhere in $C000-$FFFF — that's
|
|
// the CPU address where the fixed bank maps in at boot on every
|
|
// supported mapper (NROM, MMC1, UxROM, MMC3).
|
|
for mapper in [Mapper::NROM, Mapper::MMC1, Mapper::UxROM, Mapper::MMC3] {
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, mapper);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let banks: Vec<PrgBank> = if mapper == Mapper::NROM {
|
|
Vec::new()
|
|
} else {
|
|
vec![PrgBank::empty("X")]
|
|
};
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
// Last 6 bytes of PRG = vectors.
|
|
let prg_end = 16 + rom::validate_ines(&rom).unwrap().prg_banks * 16384;
|
|
let reset_bytes = [rom[prg_end - 4], rom[prg_end - 3]];
|
|
let reset = u16::from_le_bytes(reset_bytes);
|
|
assert!(
|
|
(0xC000..=0xFFFF).contains(&reset),
|
|
"{mapper:?} reset vector {reset:#06X} must live in fixed-bank window"
|
|
);
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_rom_size_matches_bank_count() {
|
|
// For each banked mapper, verify total ROM file size =
|
|
// 16 header + N * 16 KB PRG + 8 KB CHR.
|
|
for (mapper, switchable) in [
|
|
(Mapper::MMC1, 0usize),
|
|
(Mapper::MMC1, 1),
|
|
(Mapper::MMC1, 3),
|
|
(Mapper::UxROM, 0),
|
|
(Mapper::UxROM, 7),
|
|
(Mapper::MMC3, 0),
|
|
(Mapper::MMC3, 15),
|
|
] {
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, mapper);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let banks: Vec<PrgBank> = (0..switchable)
|
|
.map(|i| PrgBank::empty(format!("B{i}")))
|
|
.collect();
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
let expected_prg_banks = switchable + 1;
|
|
let expected_len = 16 + expected_prg_banks * 16384 + 8192;
|
|
assert_eq!(
|
|
rom.len(),
|
|
expected_len,
|
|
"{mapper:?} with {switchable} switchable banks: expected {expected_len} bytes, got {}",
|
|
rom.len(),
|
|
);
|
|
}
|
|
}
|
|
|
|
#[test]
|
|
fn link_with_mapper_nrom_produces_single_bank_rom() {
|
|
// Regression: calling link_banked with NROM and no switchable
|
|
// banks should produce the same 1-bank layout as the legacy
|
|
// `link_with_all_assets` — no extra cost for the new API.
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::NROM);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &[]);
|
|
let info = rom::validate_ines(&rom).unwrap();
|
|
assert_eq!(info.prg_banks, 1);
|
|
assert_eq!(info.mapper, 0);
|
|
assert_eq!(rom.len(), 16 + 16384 + 8192);
|
|
}
|
|
|
|
#[test]
|
|
fn link_banked_chr_rom_survives_with_switchable_banks() {
|
|
// The default smiley + any sprites should still appear in CHR
|
|
// ROM even when switchable PRG banks are present.
|
|
let linker = Linker::with_mapper(Mirroring::Horizontal, Mapper::MMC1);
|
|
let user_code = vec![Instruction::implied(NOP)];
|
|
let banks = vec![PrgBank::empty("X")];
|
|
let rom = linker.link_banked(&user_code, &[], &[], &[], &banks);
|
|
// CHR starts after 2 PRG banks.
|
|
let chr_start = 16 + 2 * 16384;
|
|
// First 16 bytes = smiley tile, non-zero.
|
|
assert_ne!(&rom[chr_start..chr_start + 16], &[0u8; 16]);
|
|
}
|
|
|
|
#[test]
|
|
fn palette_load_writes_to_ppu() {
|
|
let linker = Linker::new(Mirroring::Horizontal);
|
|
let palette_insts = linker.gen_palette_load();
|
|
|
|
// Should write to PPU address register ($2006) twice
|
|
let ppu_addr_writes: Vec<_> = palette_insts
|
|
.iter()
|
|
.filter(|i| i.opcode == STA && i.mode == AM::Absolute(0x2006))
|
|
.collect();
|
|
assert_eq!(
|
|
ppu_addr_writes.len(),
|
|
2,
|
|
"should set PPU address (high and low bytes)"
|
|
);
|
|
|
|
// Should write 32 palette bytes to $2007
|
|
let ppu_data_writes: Vec<_> = palette_insts
|
|
.iter()
|
|
.filter(|i| i.opcode == STA && i.mode == AM::Absolute(0x2007))
|
|
.collect();
|
|
assert_eq!(
|
|
ppu_data_writes.len(),
|
|
32,
|
|
"should write all 32 palette bytes"
|
|
);
|
|
}
|